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  rev. 1.2 february 2011 www.aosmd.com page 1 of 14 AOZ1038 ezbuck? 6 a synchronous buck regulator general description the AOZ1038 is a high efficiency, easy to use, 6 a synchronous buck regulator. the AOZ1038 works from a 4.5 v to 18 v input voltage range and provides up to 6 a of continuous output current with an output voltage adjustable down to 0.8 v. the AOZ1038 is available in a 5x6 dfn-8 package or an exposed pad so-8 package. both are rated over a -40 c to +85 c ambient temperature range. features z 4.5 v to 18 v operating input voltage range z synchronous buck: 55 m internal high-side switch and 12 m internal low-side switch z high efficiency: up to 95 % z internal soft start z active high power good state z output voltage adjustable to 0.8 v z 6 a continuous output current z fixed 450 khz pwm operation z cycle-by-cycle current limit z pre-bias start-up z short-circuit protection z thermal shutdown z thermally enhanced 5x6 dfn-8 and exposed pad so-8 packages applications z point of load dc/dc converters z lcd tv z set top boxes z dvd / blu-ray players/recorders z cable modems z pcie graphics cards typical application figure 1. 3.3v 6 a synchronous buck regulator lx vin vin vout = 1.2v fb pgnd en comp agnd c2, c3, c4 22f ceramic r1 r2 c c r c c1 22f ceramic l1 2.2h AOZ1038
AOZ1038 rev. 1.2 february 2011 www.aosmd.com page 2 of 14 ordering information aos green products use reduced levels of halogens, and are also rohs compliant. please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information. pin configuration pin description part number ambient temperature range package environmental AOZ1038di -40 c to +85 c 5x6 dfn-8 green product AOZ1038pi exposed pad so-8 pin number pin name pin function 5x6 dfn-8 exposed pad so-8 1 1 pgnd power ground. pgnd needs to be electrically connected to agnd. 2 2 vin supply voltage input. when vin rises above the uvlo threshold and en is logic high, the device starts up. 3 3 agnd analog ground. agnd is the reference point for controller section. agnd needs to be electrically connected to pgnd. 4 4 fb feedback input. the fb pin is used to set the output voltage via a resistive voltage divider between the output and agnd. 5 5 comp external loop compensation pin. connect a rc network between comp and agnd to compensate the control loop. 6 6 en enable pin. pull en to logic high to enable the device. pull en to logic low to disable the device. if on/off control is not needed, connect it to vin and do not leave it open. 7, 8 7, 8 nc no connect pin. pin 7 and 8 ar e not internally connected. connect these two pins externally to lx and use them for better thermal performance. exposed pad exposed pad lx switching node. lx is the drain of the internal pfet. lx is used as the thermal pad of the power stage. pgnd vin agnd fb nc nc en comp 5x6 dfn-8 (top view) 1 2 3 4 8 7 6 5 1 2 3 4 pgnd vin agnd fb exposed pad so-8 (top view) pad (lx) nc nc en comp 8 7 6 5 pad (lx)
AOZ1038 rev. 1.2 february 2011 www.aosmd.com page 3 of 14 block diagram absolute maximum ratings exceeding the absolute maximum ratings may damage the device. note: 1. devices are inherently esd s ensitive, handling precautions are required. human body model rating: 1.5 k in series with 100 pf. recommended operating conditions the device is not guaranteed to operate beyond the maximum recommended operating conditions. 450khz oscillator agnd pgnd vin en fb comp lx otp internal +5v ilimit pwm control logic 5v ldo regulator uvlo & por softstart reference & bias 0.8v q1 q2 pwm comp level shifter + fet driver isen eamp 0.2v + ? + ? + ? + ? + short circuit detection comparator parameter rating supply voltage (v in ) 20 v lx to agnd -0.7 v to v in +0.3 v lx to agnd 23 v (< 50 ns) en to agnd -0.3 v to v in +0.3 v fb to agnd -0.3 v to 6 v comp to agnd -0.3 v to 6 v pgnd to agnd -0.3 v to +0.3 v junction temperature (t j ) +150 c storage temperature (t s ) -65 c to +150 c esd rating (1) 2.0 kv parameter rating supply voltage (v in ) 4.5 v to 18 v output voltage range 0.8 v to v in ambient temperature (t a ) -40 c to +85 c package thermal resistance ( ja ) 5x6 dfn-8 exposed pad so-8 23 c/w 40 c/w
AOZ1038 rev. 1.2 february 2011 www.aosmd.com page 4 of 14 electrical characteristics t a = 25 c, v in = v en = 12 v, v out = 3.3 v unless otherwise specified. specifications in bold indicate a temperature range of -40 c to +85 c. symbol parameter conditions min. typ. max units v in supply voltage 4.5 18 v v uvlo input under-voltage lockout threshold v in rising v in falling 4.1 3.7 v v i in supply current (quiescent) i out = 0, vfb = 1.2 v, v en >1.2 v 1.6 2.5 ma i off shutdown supply current v en = 0 v 110 a v fb feedback voltage t a = 25 c 0.788 0.8 0.812 v load regulation 0.5 % line regulation 1 % i fb feedback voltage input current 200 na v en en input threshold off threshold on threshold 2 0.6 v v v hys en input hysteresis 100 mv modulator f o frequency 400 450 500 khz d max maximum duty cycle 100 % d min minimum on time 150 ns error amplifier voltage gain 500 v / v error amplifier transconductance 150 a / v protection i lim current limit 6.8 7.2 a over-temperature shutdown limit t j rising t j falling 150 100 c c t ss soft start interval 3 ms output stage high-side switch on-resistance v in = 12v v in = 5v 55 75 m low-side switch on-resistance v in = 12v v in = 5v 12 15 m
AOZ1038 rev. 1.2 february 2011 www.aosmd.com page 5 of 14 detailed description the AOZ1038 is a current-mode step down regulator with an integrated high-side pmos switch and a low-side nmos switch. it operates from a 4.5 v to 18 v input voltage range and supplies up to 6 a of load current. the duty cycle can be adjusted from 6 % to 100 % allowing a wide range of output voltages. features include enable control, power-on reset, input under voltage lockout, output over voltage protection, active high power good state, fixed internal soft-start, and thermal shut down. the AOZ1038 is available in a 5x6 dfn-8 package or an exposed pad so-8 package. enable and soft start the AOZ1038 has an internal soft start feature to limit in-rush current and ensure the output voltage smoothly ramps up to regulation voltage. the soft start process begins when the input voltage rises to 4.1 v and the voltage on the en pin is high. in the soft start process, output voltage is typically ramped to regulation voltage in 4 ms. the 4 ms soft start time is set internally. the en pin of the AOZ1038 is active high. connect the en pin to vin if the enable function is not used. pulling en to ground will disable the AOZ1038. do not leave the en pin open. the voltage on en must be above 2 v to enable the AOZ1038. when voltage on the en pin falls below 0.6 v, the AOZ1038 is disabled. if an application circuit requires the AOZ1038 to be disabled, an open drain or open collector circuit should be used to interface the en pin. steady-state operation under steady-state conditions, the converter operates in fixed frequency and continuous-conduction mode (ccm). the AOZ1038 integrates an internal p-mosfet as the high-side switch. inductor current is sensed by amplifying the voltage drop across the drain to the source of the high side power mosfet. output voltage is divided down by the external voltage divider at the fb pin. the difference between the fb pin voltage and reference voltage is amplified by the internal transconductance error amplifier. the error voltage, which shows on the comp pin, is compared against the current signal. the current signal is the sum of the inductor current signal and ramp compensation signal, at the pwm comparator input. if the current signal is less than the error voltage, the internal high-side switch is on. when on, the inductor current flows from the input through the inductor to the output. when the current signal exceeds the error voltage, the high-side switch is off. when off, inductor current is freewheeling through the internal low-side n-mosfet switch to output. the internal adaptive fet driver guarantees no turn on overlap of the high-side and low-side switches. compared to regulators using freewheeling schottky diodes, the AOZ1038 uses freewheeling nmosfet to realize synchronous rectification. this greatly improves the converter efficiency and reduces power loss in the low-side switch. the AOZ1038 uses a p-channel mosfet as the high-side switch. this eliminates the bootstrap capacitor normally seen in a circui t using an nmos switch. it allows 100 % turn-on of the high-side switch to achieve a linear regulation mode of operation. the minimum voltage drop from v in to v o is the load current times dc resistance of the mosfet plus dc resistance of buck inductor. it can be calculated by equation below: where; v o_max is the maximum output voltage, v in is the input voltage from 4.5 v to 18 v, i o is the output current from 0 a to 6 a, and r ds(on) is the on resistance of in ternal mosfet. the value is between 55 m and 75 m depending on input voltage and junction temperature. switching frequency the AOZ1038 switching frequency is fixed and set by an internal oscillator. the pr actical switching frequency could range from 400 khz to 500 khz due to device variation. output voltage programming output voltage can be set by feeding back the output to the fb pin by using a resistor divider network. refer to the application circuit shown in figure 1. the resistor divider network includes r 1 and r 2 . usually, a design is started by picking a fixed r 2 value and calculating the required r 1 with equation below. values of r 1 and r 2 with standard output voltages are listed in table 1 on the next page. v o_max v in i o r ds on () ? = v o 0.8 1 r 1 r 2 ------ - + ?? ?? ?? =
AOZ1038 rev. 1.2 february 2011 www.aosmd.com page 6 of 14 table 1. the combination of r 1 and r 2 should be large enough to avoid drawing excessive current from the output, which will cause power loss. since the switch duty cycle can be as high as 100%, the maximum output voltage can be set as high as the input voltage minus the voltage drop on upper pmos and the inductor. protection features the AOZ1038 has multiple protection features to prevent system circuit damage under abnormal conditions. over current protection (ocp) the sensed inductor current si gnal is also used for over current protection. since the AOZ1038 employs peak current mode control, the comp pin voltage is proportional to the peak inductor current. the comp pin voltage is limited internally to be between 0.4 v and 2.5 v. the peak inductor current is automatically limited cycle by cycle. when the output is shorted to ground under fault conditions, the inductor current decays very slowly during a switching cycle because of v o = 0 v. to prevent catastrophic failure, a secondary current limit is designed inside the AOZ1038. the measured inductor current is compared against a preset voltage which represents the current limit. when the outpu t current is more than current limit, the high side sw itch is turned off. the converter will initiate a soft start once the over-current condition is resolved. power-on reset (por) a power-on reset circuit monitors the input voltage. when the input voltage exceeds 4.1 v, the converter starts operation. when input voltage falls below 3.7 v, the converter w ill shut down. thermal protection an internal temperature sensor monitors the junction temperature. it shuts down the internal control circuit and high side pmos if the junction temperature exceeds 150 oc. the regulator will rest art automatica lly under the control of the soft-start circuit when the junction temperature decreases to 100 oc. application information the basic AOZ1038 application circuit is show in figure 1. component selection is explained below. input capacitor the input capacitor must be connected to the v in pin and the pgnd pin of the AOZ1038 to maintain steady input voltage and to filter out pulsing input current. the voltage rating of the input capacitor must be greater than maximum input voltage plus ripple voltage. the input ripple voltage can be approximated by the equation below: since the input current is discontinuous in a buck converter, the current stress on the input capacitor is another concern when selecting the capacitor. for a buck circuit, the rms value of the input capacitor current can be calculated by: if we let m equal the conversion ratio: the relationship between the input capacitor rms current and voltage conversion ratio is calculated and shown in figure 2 on the next page. it can be seen that when v o is half of v in , c in is under the worst current stress. the worst current stress on c in is 0.5 x i o . vo (v) r1 (k ) r2 (k ) 0.8 1.0 open 1.2 4.99 10 1.5 10 11.5 1.8 12.7 10.2 2.5 21.5 10 3.3 31.1 10 5.0 52.3 10 v in i o fc in ----------------- 1 v o v in -------- - ? ?? ?? ?? v o v in -------- - = i cin_rms i o v o v in -------- - 1 v o v in -------- - ? ?? ?? ?? = v o v in -------- - m =
AOZ1038 rev. 1.2 february 2011 www.aosmd.com page 7 of 14 figure 2. i cin vs. voltage conversion ratio for reliable operation and best performance, the input capacitors must have current rating higher than i cin_rms at the worst operating conditions. ceramic capacitors are preferred for input capacitors because of their low esr and high current rating. depending on the application circuits, other low esr tantalum capacitor may also be used. when selecting cerami c capacitors, x5r or x7r type dielectric ceramic capacitors should be used for their better temperature and voltage characteristics. note that the ripple current rating from capacitor manufactures are based on a certain life time. further de-rating may be necessary in practical design applications. inductor the inductor is used to supply constant current to output when it is driven by a switching voltage. for a given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is: the peak inductor current is: high inductance gives low inductor ripple current but requires a larger size inductor to avoid saturation. low ripple current reduces inductor core losses. it also reduces rms current through the inductor and switches, which results in less conduc tion loss. usually, peak to peak ripple current on inductor is designed to be 20 % to 30 % of output current. when selecting the inductor, make sure it is able to handle the peak current with out saturation, even at the highest operating temperature. the inductor takes the highest current in a buck circuit. the conduction loss on the inductor needs to be checked for thermal and efficiency requirements. surface mount inductors in different shape and styles are available from coilcraft, elytone and murata. shielded inductors are small and radiate less emi noise. they also cost more than unshielded inductors. the choice depends on emi requirements, price and size. output capacitor the output capacitor is select ed based on the dc output voltage rating, output ripple voltage specification and ripple current rating. the selected output capacito r must have a higher rated voltage specification than the maximum desired output voltage including ripple. de-rating needs to be considered for long term reliability. output ripple voltage specif ication is another important factor for selecting the output capacitor. in a buck converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and esr. it can be calculated by the equation below: where; c o is output capacitor value, and esr co is the equivalent series resistor of output capacitor. when a low esr ceramic capacitor is used as the output capacitor, the impedance of the capacitor at the switching frequency dominates. output ripple is mainly caused by capacitor value and inductor ripple current. the output ripple voltage calculation can be simplified to: if the impedance of esr at switching frequency dominates, the output ripple voltage is mainly decided by capacitor esr and inductor ripple current. the output ripple voltage calculation can be further simplified to: for lower output ripple voltage across the entire operating temperature range, x5r or x7r dielectric type of ceramic, or other low esr tantalum capacitors are recommended. 0 0.1 0.2 0.3 0.4 0.5 0 0.5 1 m i cin_rms (m) i o i l v o fl ---------- - 1 v o v in -------- - ? ?? ?? ?? = i lpeak i o i l 2 -------- + = v o i l esr co 1 8 fc o ------------------------- + ?? ?? = v o i l 1 8 fc o ------------------------- = v o i l esr co =
AOZ1038 rev. 1.2 february 2011 www.aosmd.com page 8 of 14 in a buck converter, out put capacitor current is continuous. the rms current of the output capacitor is decided by the peak to peak inductor ripple current. it can be calculated by: usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. when the buck inductor is selected to be very small and inductor ripple current is high , the output capacitor could be overstressed. loop compensation the AOZ1038 employs peak current mode control for easy use and fast transient response. peak current mode control eliminates the doubl e pole effect of the output l&c filter. it also greatly simplifies the compensation loop design. with peak current mode control, the buck power stage can be simplified to be a one-pole and one-zero system in the frequency domain. the pole is dominant can be calculated by: the zero is a esr zero due to the output capacitor and its esr. it is can be calculated by: where; c o is the output filter capacitor, r l is load resistor value, and esr co is the equivalent series resistance of output capacitor. the compensation design functions to shape the converter control loop transfer to provide the desired gain and phase. several different types of compensation networks can be used for the AOZ1038. in most cases, a series capacitor and resistor network connected to the comp pin sets the pole-zero and is adequate for a stable high-bandwidth control loop. in the AOZ1038, fb pin and comp pin are the inverting input and the output of the internal error amplifier. a series r and c compensation network connected to comp provides one pole and one zero. the pole is: where; g ea is the error amplifier transconductance, which is 150 x 10 -6 a/v, g vea is the error amplifier voltage gain, which is 500 v/v, and c c is compensation ca pacitor in figure 1. the zero given by the external compensation network, capacitor c c and resistor r c , is located at: to design the compensation circuit, a target crossover frequency f c for closed loop must be selected. the system crossover frequency is where the control loop has unity gain. the crossover is the also called the converter bandwidth. generally a higher bandwidth results in faster response to load transient. however, the bandwidth should not be too high because of system stability concern. when de signing the compensation loop, converter stability under all line and load condition must be considered. usually, it is recommended to set the bandwidth to be equal or less than 1/10 of the switching frequency. the AOZ1038 operates at a frequency range from 400 khz to 500 khz. it is recommended to choose a crossover frequency equal or less than 40 khz. the strategy for choosing r c and c c is to set the cross over frequency with r c and then set the compensator zero with c c . using selected crossover frequency, f c , to calculate r c : where; f c is desired crossover frequency. for best performance, f c is set to be about 1/10 of switching frequency, v fb is 0.8 v, g ea is the error amplifier transconductance, which is 150 x 10 -6 a/v, and g cs is the current sense circuit transconductance, which is 8 a/v. the compensation capacitor c c and resistor r c together make a zero. this zero is put somewhere close to the dominate pole f p1 but lower than 1/5 of the selected crossover frequency. c c can is selected by: i co_rms i l 12 ---------- = f p 1 1 2 c o r l ---------------------------------- - = f z 1 1 2 c o esr co ------------------------------------------------ = f p 2 g ea 2 c c g vea ------------------------------------------ - = f z 2 1 2 c c r c ----------------------------------- = f c 40 khz = r c f c v o v fb ---------- 2 c c g ea g cs ----------------------------- - = c c 1.5 2 r c f p 1 ----------------------------------- =
AOZ1038 rev. 1.2 february 2011 www.aosmd.com page 9 of 14 the equation above can also be simplified to: an easy-to-use application software which helps to design and simulate the compensation loop can be found at www.aosmd.com . thermal management and layout consideration in the AOZ1038 buck regulator circuit, high pulsing current flows through two circuit loops. the first loop starts from the input capacito rs, to the vin pin, to the lx pad, to the filter induct or, to the output capacitor and load, and then return to the input capacitor through ground. current flows in the first loop when the high side switch is on. the second loop starts from the inductor, to the output capacitors and load, to the low side nmosfet. current flows in the second loop when the low side nmosfet is on. in the pcb layout, minimizing the area of the two loops reduces the noise of the circ uit and improves efficiency. a ground plane is strongly recommended to connect the input capacitor, output capacitor, and pgnd pin of the AOZ1038. in the AOZ1038 buck regulator circuit, the major power dissipating components are the AOZ1038 and the output inductor. the total power dissi pation of converter circuit can be measured by input power minus output power. the power dissipation of inductor can be approximately calculated by output current and dcr of inductor. the actual junction temperature can be calculated with power dissipation in the AOZ1038 and thermal impedance from junction to ambient. the maximum junction tem perature of AOZ1038 is 150 oc, which limits the maximu m load current capability. the thermal performance of the AOZ1038 is strongly affected by the pcb layout. care should be taken during the design process to ensure that the ic will operate under the recommended environmental conditions. c c c o r l r c --------------------- = p total_loss v in i in v o i o ? = p inductor_loss i o 2 r inductor 1.1 = t junction p total_loss p inductor_loss ? () ja =
rev. 1.2 february 2011 www.aosmd.com page 10 of 14 AOZ1038 package dimensions, exposed pad so-8 notes: 1. package body sizes exclude mold flash and gate burrs. 2. dimension l is measured in gauge plane. 3. tolerance 0.10mm unless otherwise specified. 4. controlling dimension is millimeter, converted inch dimensions are not necessarily exact. 5. die pad exposure size is according to lead frame design. 6. followed from jedec ms-012 symbols a a1 a2 b c d d0 d1 e e e1 e2 e3 l y | l1?l1' | l1 dimensions in millimeters recommended land pattern min. 1.40 0.00 1.40 0.31 0.17 4.80 3.20 3.10 5.80 ? 3.80 2.21 0.40 ? 0 ? d0 unit: mm nom. 1.55 0.05 1.50 0.406 ? 4.96 3.40 3.30 6.00 1.27 3.90 2.41 0.40 ref 0.95 ? 3 0.04 1.04 ref max. 1.70 0.10 1.60 0.51 0.25 5.00 3.60 3.50 6.20 ? 4.00 2.61 1.27 0.10 8 0.12 dimensions in inches d1 e1 e e3 e2 note 5 l1' l1 l gauge plane 0.2500 c d 7 (4x) b 3.70 2.20 2.87 2.71 5.74 1.27 0.80 0.635 e a1 a2 a symbols a a1 a2 b c d d0 d1 e e e1 e2 e3 l y | l1?l1' | l1 min. 0.055 0.000 0.055 0.012 0.007 0.189 0.126 0.122 0.228 ? 0.150 0.087 0.016 ? 0 ? nom. 0.061 0.002 0.059 0.016 ? 0.195 0.134 0.130 0.236 0.050 0.153 0.095 0.016 ref 0.037 ? 3 0.002 0.041 ref max. 0.067 0.004 0.063 0.020 0.010 0.197 0.142 0.138 0.244 ? 0.157 0.103 0.050 0.004 8 0.005
AOZ1038 rev. 1.2 february 2011 www.aosmd.com page 11 of 14 tape and reel dimens ions, exposed pad so-8 carrier tape reel tape size 12mm reel size ?330 m ?330.00 0.50 package so-8 (12mm) a0 6.40 0.10 b0 5.20 0.10 k0 2.10 0.10 d0 1.60 0.10 d1 1.50 0.10 e 12.00 0.10 e1 1.75 0.10 e2 5.50 0.10 p0 8.00 0.10 p1 4.00 0.10 p2 2.00 0.10 t 0.25 0.10 n ?97.00 0.10 k0 unit: mm b0 g m w1 s k h n w v r trailer tape 300mm min. or 75 empty pockets components tape orientation in pocket leader tape 500mm min. or 125 empty pockets a0 p1 p2 feeding direction p0 e2 e1 e d0 t d1 w 13.00 0.30 w1 17.40 1.00 h ?13.00 +0.50/-0.20 k 10.60 s 2.00 0.50 g ? r ? v ? leader/trailer and orientation unit: mm
rev. 1.2 february 2011 www.aosmd.com page 12 of 14 AOZ1038 package dimensions, 5x6 dfn, 8l notes: 1. package body sizes exclude mold flash and gate burrs. mold flash at the non-lead sides should be less than 6 mils each. 2. controlling dimension is millimeter. converted inch dimensions are not necessarily exact. symbols a a1 b c d d1 e e1 e2 e3 e l l1 dimensions in millimeters recommended land pattern side view top view bottom view min. 0.85 0.00 0.30 0.15 0.45 0 0 nom. 0.95 ? 0.40 0.20 5.20 bsc 4.35 bsc 5.55 bsc 6.05 bsc 3.15 bsc 1.575 bsc 1.27 bsc 0.55 ? ? max. 1.00 0.05 0.50 0.25 0.65 0.15 10 symbols a a1 b c d d1 e e1 e2 e3 e l l1 dimensions in inches min. 0.033 0.000 0.012 0.006 0.018 0 0 nom. 0.037 ? 0.016 0.008 0.205 bsc 0.171 bsc 0.219 bsc 0.238 bsc 0.124 bsc 0.062 bsc 0.050 bsc 0.022 ? ? max. 0.039 0.002 0.020 0.010 0.026 0.006 10 e2 d1 e e1 e view 'a' (scale 5:1) view ?a? unit: mm 0.05 l1 l a1 c a d b e3 1.6750 3.3500 0.5000 0.6500 2.7500 1.2700 4.6000
rev. 1.2 february 2011 www.aosmd.com page 13 of 14 AOZ1038 tape and reel dime nsions, 5x6 dfn, 8l package dfn 5x6 (12mm) a0 b0 k0 e e1 e2 d0 d1 p0 p1 p2 t 6.30 0.10 0.10 1.30 min. 1.50 1.55 0.05 0.30 12.00 0.10 1.75 0.10 5.50 0.10 8.00 0.10 4.00 0.10 2.00 0.05 0.30 unit: mm e1 e2 e 0.10 5.45 carrier tape reel trailer tape 300mm min. or 75 empty pockets components tape orientation in pocket leader tape 500mm min. or 125 empty pockets leader/trailer and orientation feeding direction d1 p1 p2 k0 b0 t a0 p0 d0 y y c l r v m n g s w n m ? 97.00 ? 330.0 0.50 13.00 12 mm tape size v r s k 0.5 2.0 10.60 g ??? h w1 ? 13.0 +0.50/-0.20 17.40 h k w w1 reel size ? 330 unit: mm 0.10 0.30 1.00
rev. 1.2 february 2011 www.aosmd.com page 14 of 14 AOZ1038 part marking z1038di fay part number code assembly lot code year & week code wlt fab & assembly location z1038pi fay part number code assembly lot code year & week code wlt fab & assembly location 5x6 dfn-8 exposed pad so-8 as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provid ed in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. this datasheet contains preliminary data; supplementary data may be published at a later date. alpha & omega semiconductor reserves the right to make changes at any time without notice. life support policy alpha & omega semiconductor products ar e not authorized for use as critical components in life supp ort devices or systems.


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